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2.25.1 Intel i80386/i80386DX CPU

32 bit internal data bus.
32 bit external data bus (DX: Double-word eXternal).
32 bit address bus.

12 MHz: first 16 MHz CPUs had clock speed troubles and were released as 12 MHz items.
16 MHz: early Intel i80386 CPUs had a bug in the 32 bit MUL instruction (MUL bug); it is fixed in the double-sigma step level, no longer available.
20 MHz: no longer available.
25 MHz: iCOMP 49.
33 MHz: 2000 mW, iCOMP 68.

October 1985.

Package: 132 pin PGA (Pin Grid Array).

Technology: 1 micron CMOS.
275E3 transistors.

ID: AH=0x03 (Intel i80386 CPU).

ID:

• step level A (Intel i80386 CPU): DH = 0x00 (model ID, family ID),
• step level B0-B10 (Intel i80386 CPU, CMOS III): DH = 0x03 (model ID, family ID), DL = 0x03 (revision),
• step level D0 (Intel i80386DX CPU, CMOS III): DH = 0x03 (model ID, family ID), DL = 0x05 (revision),
• step level D1-D2 (Intel i80386DX CPU, CMOS IV): DH = 0x03 (model ID, family ID), DL = 0x08 (revision),
• step level Ex, Fx: DH = 0x03 (model ID, family ID), DL = 0x08 (revision).