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2.45.1 Cyrix 5x86 CPU

Primary cache: 16 kbyte unified, write-back, 4-way set-associative.

2x, 3x clock multiplier.

Power management:

• SMM (System Management Mode),
• hardware suspend, stop clock,
• FPU auto-idle.

50/100, 33/100 (Cyrix Cx5x86-100GP/QP CPU): 3.45 V, July 1995.
40/120 (Cyrix Cx5x86-120GP/QP CPU): 3.45 V.

The multiplier can be 2 or 3.

In general practice, even faster than Intel's Pentium Pro CPUs (Cyrix optimized for 16 bit code, Intel optimized the Pentium and Pentium Pro CPUs for 32 bit code).

Package:

• 168 pin PGA (Pin Grid Array) (GP),
• 208 pin QFP (Quad Flat Package) (QP).