Intel Pentium CPU compatible.
Clock doubled/tripled.
16 kbyte unified cache: write-back, 4-way set-associative.
Power management:
3.3 V, 5 V I/O.
50 MHz.
100 MHz (announced: third quarter 1995).
120 MHz.
Not available anymore due to compatibility problems.
3.3 V, 5 V I/O.
Superscalar: 2-issue, 7-stage.
Branch prediction, branch target cache.
Load/store unit.
FPU: 4 64 bit write buffers.
Package: 296 pin PGA (Pin Grid Array).
Technology: 0.5 micron CMOS (IBM, SGS-Thomson).
DIR0 register: 0x30.