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bookmark site19.2 Intel Core 2 Duo mobile processor
19.2.1 Intel Core 2 Duo T7xxx series mobile processor (Merom, Socket M )
Identification
Model name:
Core 2 Duo T7xxx series.
Code name:
Merom, Socket M.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 4 Mbyte.
Architecture
166 MHz QDR bus.
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
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Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 166/2000 MHz | Intel Core 2 Duo T7200 CPU | 12 | August 2006 |
OEM (BGA): LE80537GF0414M, OEM (PGA): LF80537GF0414M, PIB (PGA): BX80537T7200 |
| 166/2166 MHz | Intel Core 2 Duo T7400 CPU | 13 | August 2006 |
OEM (BGA): LE80537GF0484M, OEM (PGA): LF80537GF0484M, PIB (PGA): BX80537T7400 |
| 166/2333 MHz | Intel Core 2 Duo T7600 CPU | 14 | August 2006 |
OEM (BGA): LE80537GF0534M, OEM (PGA): LF80537GF0534M, PIB (PGA): BX80537T7600 |
Physics
Voltage: (1.0375-1.30 V).
Power dissipation: 34 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 291 million.
Die size: 143 mm2.
Packaging: Socket M.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0x6 | stepping B2 |
Step level
Text:
Step levels: B2.
S-Spec / Stepping code
| Model | Code | Stepping | Description |
|---|---|---|---|
| Intel Core 2 Duo T7600 CPU | SL9SD | B2 | Socket M (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7400 CPU | SL9SE | B2 | Socket M (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7200 CPU | SL9SF | B2 | Socket M (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7600 CPU | SL9SJ | B2 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7400 CPU | SL9SK | B2 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7200 CPU | SL9SL | B2 | FCBGA6/Micro-FCBGA |
19.2.2 Intel Core 2 Duo T5xxx series mobile processor (Merom, 2 Mbyte L2 cache , Socket M )
Identification
Model name:
Core 2 Duo T5xxx series.
Code name:
Merom, 2 Mbyte L2 cache, Socket M.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 2 Mbyte (other 2 Mbyte disfunctional/disabled).
Architecture
133/166 MHz QDR bus.
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Voltage interval | Introduction | Order part numbers |
|---|---|---|---|---|---|
| 133/1600 MHz | Intel Core 2 Duo T5200 1 2 CPU | 12 | 1.075-1.250 V | October 2006 | OEM (PGA): LF80537GE0251M |
| 166/1667 MHz | Intel Core 2 Duo T5500 1 CPU | 10 | 1.0375-1.30 V | August 2006 |
OEM (BGA): LE80537GF0282M, OEM (PGA): LF80537GF0282M, PIB (PGA): BX80537T5500 |
| 166/1833 MHz | Intel Core 2 Duo T5600 CPU | 11 | 1.0375-1.30 V | August 2006 |
OEM (BGA): LE80537GF0342M, OEM (PGA): LF80537GF0342M, PIB (PGA): BX80537T5600 |
Physics
Voltage: (1.0375-1.30 V).
Power dissipation: 34 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 291 million.
Die size: 143 mm2.
Packaging: Socket M.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0x6 | stepping B2 |
Step level
Text:
Step levels: B2.
S-Spec / Stepping code
| Model | Code | Stepping | Description |
|---|---|---|---|
| Intel Core 2 Duo T5600 CPU | SL9SG | B2 | Socket M (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T5500 CPU | SL9SH | B2 | Socket M (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T5600 CPU | SL9SP | B2 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T5500 CPU | SL9SQ | B2 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T5200 CPU | SL9VP | B2 | Socket M (FCPGA6/Micro-FCPGA) |
19.2.3 Intel Core 2 Duo T7xxx series mobile processor (Merom, Socket P )
Identification
Model name:
Core 2 Duo T7xxx series.
Code name:
Merom, Socket P.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 4 Mbyte.
Architecture
100-200 MHz QDR bus (Dynamic Front-Side Bus Frequency Switching).
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 200/2000 MHz | Intel Core 2 Duo T7300 CPU | 10 | May 2007 |
OEM (BGA, stepping E1): LE80537GG0414M, OEM (PGA, stepping E1): LF80537GG0414M, PIB (PGA, stepping E1): BX80537T7300 |
| 200/2200 MHz | Intel Core 2 Duo T7500 CPU | 11 | May 2007 |
OEM (BGA, stepping E1, G0): LE80537GG0494M, OEM (PGA, stepping E1, G0): LF80537GG0494M, PIB (PGA, stepping E1, G0): BX80537T7500 |
| 200/2400 MHz | Intel Core 2 Duo T7700 CPU | 12 | May 2007 |
OEM (BGA, stepping E1, G0): LE80537GG0564M, OEM (PGA, stepping E1, G0): LF80537GG0564M, PIB (PGA, stepping E1, G0): BX80537T7700 |
| 200/2600 MHz | Intel Core 2 Duo T7800 CPU | 13 | September 2007 |
OEM (BGA, stepping G0): LE80537GG0644M, OEM (PGA, stepping G0): LF80537GG0644ML, PIB (PGA, stepping G0): BX80537T7800 |
Physics
Voltage: (1.0375-1.30 V).
Power dissipation: 34 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 291 million.
Die size: 143 mm2.
Packaging: Socket P.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0xA | stepping E1 |
| 0x0 | 0x6 | 0xF | 0xB | stepping G0 |
Step level
Text:
Step levels:
- E1,
- G0 (September 2, 2007).
S-Spec / Stepping code
| Model | Code | Stepping | Description |
|---|---|---|---|
| Intel Core 2 Duo T7700 CPU | SLA3M | E1 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7500 CPU | SLA3N | E1 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7300 CPU | SLA3P | E1 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7700 CPU | SLA43 | E1 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7500 CPU | SLA44 | E1 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7300 CPU | SLA45 | E1 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7800 CPU | SLA75 | G0 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7700 CPU | SLADL | G0 | FCBGA6/Micro-FCBGA |
| Model | Code | Stepping | Description |
| Intel Core 2 Duo T7500 CPU | SLADM | G0 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7800 CPU | SLAF6 | G0 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7700 CPU | SLAF7 | G0 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7500 CPU | SLAF8 | G0 | Socket P (FCPGA6/Micro-FCPGA) |
19.2.4 Intel Core 2 Duo LV L7xxx series mobile processor (Merom LV)
Identification
Model name:
Core 2 Duo LV L7xxx series.
Code name:
Merom LV.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 4 Mbyte.
Architecture
166 MHz or 100-200 MHz QDR bus (Dynamic Front-Side Bus Frequency Switching).
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 166/1333 MHz | Intel Core 2 Duo LV L7200 CPU | 8 | Q1 2007 | OEM (stepping B2): LE80537LF0144M |
| 200/1400 MHz | Intel Core 2 Duo LV L7300 CPU | 7 | May 2007 | OEM (stepping E1): LE80537LG0174M |
| 166/1500 MHz | Intel Core 2 Duo LV L7400 CPU | 9 | Q1 2007 | OEM (stepping B2): LE80537LF0214M |
| 200/1600 MHz | Intel Core 2 Duo LV L7500 CPU | 8 | May 2007 | OEM (stepping E1, G0): LE80537LG0254M |
| 200/1800 MHz | Intel Core 2 Duo LV L7700 CPU | 9 | September 2007 | OEM (stepping G0) |
Physics
- stepping B2: 0.975-1.062 V (0.90-1.10 V),
- stepping E1, G0: 0.975-1.062 V (0.90-1.20 V),
Power dissipation: 17 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 291 million.
Die size: 143 mm2.
Packaging: FCBGA6.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0x6 | stepping B2 |
| 0x0 | 0x6 | 0xF | 0xA | stepping E1 |
| 0x0 | 0x6 | 0xF | 0xB | stepping G0 |
Step level
Text:
Step levels:
- B2,
- E1,
- G0 (September 2, 2007).
S-Spec / Stepping code
| Model | Code | Stepping |
|---|---|---|
| Intel Core 2 Duo LV L7400 CPU | SL9SM | B2 |
| Intel Core 2 Duo LV L7200 CPU | SL9SN | B2 |
| Intel Core 2 Duo LV L7500 CPU | SLA3R | E1 |
| Intel Core 2 Duo LV L7300 CPU | SLA3S | E1 |
| Intel Core 2 Duo LV L7700 CPU | G0 | |
| Intel Core 2 Duo LV L7500 CPU | QXMV | G0 QS |
| Intel Core 2 Duo LV L7500 CPU | SLAET | G0 |
19.2.5 Intel Core 2 Duo T5xxx series mobile processor (Merom 2M, Socket M )
Identification
Model name:
Core 2 Duo T5xxx series.
Code name:
Merom 2M, Socket M.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 2 Mbyte.
Architecture
133/166 MHz QDR bus.
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Voltage interval | Introduction | Order part numbers |
|---|---|---|---|---|---|
| 133/1733 MHz | Intel Core 2 Duo T5300 1 2 CPU | 13 | 1.075-1.250 V | Q1 2007 | OEM (PGA): LF80537GE0302M |
| 166/1667 MHz | Intel Core 2 Duo T5500 CPU | 10 | 1.0375-1.30 V | January 2007 |
OEM (BGA): LE80537GF0282M, OEM (PGA): LF80537GF0282M, PIB (PGA): BX80537T5500 |
| 166/1833 MHz | Intel Core 2 Duo T5600 CPU | 11 | 1.0375-1.30 V | January 2007 |
OEM (BGA): LE80537GF0342M, OEM (PGA): LF80537GF0342M, PIB (PGA): BX80537T5600 |
Physics
Voltage: (1.0375-1.30 V).
Power dissipation: 34 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 167 million.
Die size: 111 mm2.
Packaging: Socket M.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0x2 | stepping L2 |
Step level
Text:
Step levels: L2.
S-Spec / Stepping code
| Model | Code | Stepping | Description | Introduction |
|---|---|---|---|---|
| Intel Core 2 Duo T5600 CPU | QUFU | L2 QS | Socket M (FCPGA6/Micro-FCPGA) | November 2006 |
| Intel Core 2 Duo T5600 CPU | SL9U3 | L2 | Socket M (FCPGA6/Micro-FCPGA) | January 2007 |
| Intel Core 2 Duo T5500 CPU | QUGG | L2 QS | Socket M (FCPGA6/Micro-FCPGA) | November 2006 |
| Intel Core 2 Duo T5500 CPU | SL9U4 | L2 | Socket M (FCPGA6/Micro-FCPGA) | January 2007 |
| Intel Core 2 Duo T5600 CPU | QUGK | L2 QS | FCBGA6/Micro-FCBGA | November 2006 |
| Intel Core 2 Duo T5600 CPU | SL9U7 | L2 | FCBGA6/Micro-FCBGA | January 2007 |
| Intel Core 2 Duo T5500 CPU | QUGO | L2 QS | FCBGA6/Micro-FCBGA | November 2006 |
| Intel Core 2 Duo T5500 CPU | SL9U8 | L2 | FCBGA6/Micro-FCBGA | January 2007 |
| Model | Code | Stepping | Description | Introduction |
| Intel Core 2 Duo T5300 CPU | SL9WE | L2 | Socket M (FCPGA6/Micro-FCPGA) |
19.2.6 Intel Core 2 Duo T5xxx/T7xxx series mobile processor (Merom 2M, Socket P )
Identification
Model name:
Core 2 Duo T5xxx/T7xxx series.
Code name:
Merom 2M, Socket P.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 2 Mbyte.
Architecture
100-166/200 MHz QDR bus (Dynamic Front-Side Bus Frequency Switching).
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
T7xxx series: Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Voltage | Introduction | Order part numbers |
|---|---|---|---|---|---|
| 166/1500 MHz | Intel Core 2 Duo T5250 1 2 CPU | 9 | 1.0375-1.3000 V | Q2 2007 | OEM (PGA): LF80537GF0212M |
| 200/1400 MHz | Intel Core 2 Duo T5270 1 2 CPU | 7 | 1.0375-1.3000 V | October 2007 | |
| 166/1667 MHz | Intel Core 2 Duo T5450 1 2 CPU | 10 | 1.0375-1.3000 V | Q2 2007 | OEM (PGA): LF80537 T5450 |
| 200/1600 MHz | Intel Core 2 Duo T5470 1 2 CPU | 8 | 1.0375-1.3000 V | July 2007 | OEM (PGA): LF80537 T5470 |
| 166/1833 MHz | Intel Core 2 Duo T5550 1 2 CPU | 11 | 1.075-1.175 V | January 2008 | OEM (PGA): LF80537GF0342MT |
| 166/2000 MHz | Intel Core 2 Duo T5750 1 2 CPU | 12 | 1.0375-1.3000 V | January 2008 | |
| 166/2167 MHz | Intel Core 2 Duo T5850 1 2 CPU | 13 | March 2008 | ||
| 200/1800 MHz | Intel Core 2 Duo T7100 CPU | 9 | 1.075-1.175 V | May 2007 |
OEM (BGA): LE80537GG0332M, OEM (PGA): LF80537GG0332M, PIB (PGA): BX80537T7100 |
| Clock speed | Model | Multiplier | Voltage | Introduction | Order part numbers |
| 200/2000 MHz | Intel Core 2 Duo T7250 CPU | 10 | 1.075-1.175 V | September 2007 |
OEM (BGA): LE80537GG0412M, OEM (PGA): LF80537GG0412M, PIB (PGA): BX80537T7250 |
Physics
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 167 million.
Die size: 111 mm2.
Packaging: Socket P.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0xD | stepping M0 |
Step level
Text:
Step levels: M0.
S-Spec / Stepping code
| Model | Code | Stepping | Description |
|---|---|---|---|
| Intel Core 2 Duo T7250 CPU | SLA3T | M0 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7100 CPU | SLA3U | M0 | FCBGA6/Micro-FCBGA |
| Intel Core 2 Duo T7250 CPU | SLA49 | M0 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T7100 CPU | SLA4A | M0 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T5750 CPU | M0 | Socket P (FCPGA6/Micro-FCPGA) | |
| Intel Core 2 Duo T5550 CPU | SLA4E | M0 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T5450 CPU | SLA4F | M0 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T5250 CPU | SLA9S | M0 | Socket P (FCPGA6/Micro-FCPGA) |
| Model | Code | Stepping | Description |
| Intel Core 2 Duo T5470 CPU | SLAEB | M0 | Socket P (FCPGA6/Micro-FCPGA) |
| Intel Core 2 Duo T5270 CPU | M0 | Socket P (FCPGA6/Micro-FCPGA) |
19.2.7 Intel Core 2 Duo ULV U7xxx series mobile processor (Merom 2M ULV)
Identification
Model name:
Core 2 Duo ULV U7xxx series.
Code name:
Merom 2M ULV.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 2 Mbyte.
Architecture
133 MHz QDR bus.
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 133/1066 MHz | Intel Core 2 Duo ULV U7500 CPU | 8 | April 2007 | OEM (stepping L2, M0): LE80537UE0042M |
| 133/1200 MHz | Intel Core 2 Duo ULV U7600 CPU | 9 | April 2007 | OEM (stepping L2, M0): LE80537UE0092M |
| 133/1333 MHz | Intel Core 2 Duo ULV U7700 CPU | 10 | December 2007 | OEM (stepping M0) |
Physics
Voltage: 0.80-0.975 V.
Power dissipation: 10 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 167 million.
Die size: 111 mm2.
Packaging: FCBGA6.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0x2 | stepping L2 |
| 0x0 | 0x6 | 0xF | 0xD | stepping M0 |
Step level
Text:
Step levels:
- L2,
- M0 (Q3 2007).
S-Spec / Stepping code
| Model | Code | Stepping |
|---|---|---|
| Intel Core 2 Duo ULV U7600 CPU | SLA2U | L2 |
| Intel Core 2 Duo ULV U7500 CPU | SLA2V | L2 |
| Intel Core 2 Duo ULV U7700 CPU | SLV3V | M0 |
| Intel Core 2 Duo ULV U7600 CPU | SLV3W | M0 |
| Intel Core 2 Duo ULV U7500 CPU | SLV3X | M0 |
19.2.8 Intel Core 2 Duo T9xxx series mobile processor (Penryn)
Identification
Model name:
Core 2 Duo T9xxx series.
Code name:
Penryn.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 6 Mbyte.
Architecture
100-200 MHz QDR bus (Dynamic Front-Side Bus Frequency Switching).
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Intel Dynamic Acceleration (IDA): while running extended serial code, one core can temporary run at a higher frequency while the other is turned off, so the total power dissipation stays within the operating limits.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 200/2500 MHz | Intel Core 2 Duo T9300 CPU | 12.5 | January 2008 |
OEM (BGA): EC80576GG0606M, OEM (PGA): FF80576GG0606M, PIB (PGA): BX80576T9300 |
| 200/2600 MHz | Intel Core 2 Duo T9500 CPU | 13 | January 2008 |
OEM (BGA): EC80576GG0646M, OEM (PGA): FF80576GG0646M |
Physics
- s-spec SLAPV, SLAPW: (1.00-1.250 V),
- others: (1.062-1.150 V).
Power dissipation: 35 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 45 nm (P1266).
Number of transistors: 410 million.
Die size: 110 mm2.
Packaging: Socket P.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Extended family | Extended model | Type | Family | Model | Stepping | Description |
|---|---|---|---|---|---|---|
| 0x0 | 0x1 | 0x0 | 0x6 | 0x7 | 0x6 | stepping C0 |
Step level
Text:
Step levels: C0.
S-Spec / Stepping code
| Model | Code | Stepping |
|---|---|---|
| Intel Core 2 Duo T9300 CPU | SLAPV | C0 |
| Intel Core 2 Duo T9500 CPU | SLAPW | C0 |
| Intel Core 2 Duo T9300 CPU | SLAQG | C0 |
| Intel Core 2 Duo T9500 CPU | SLAQH | C0 |
| Intel Core 2 Duo T9500 CPU | SLAYY | C0 |
19.2.9 Intel Core 2 Duo T8xxx series mobile processor (Penryn 3M)
Identification
Model name:
Core 2 Duo T8xxx series.
Code name:
Penryn 3M.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 3 Mbyte.
Architecture
100-200 MHz QDR bus (Dynamic Front-Side Bus Frequency Switching).
Memory protection: XD bit.
Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Intel Dynamic Acceleration (IDA): while running extended serial code, one core can temporary run at a higher frequency while the other is turned off, so the total power dissipation stays within the operating limits.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 200/2100 MHz | Intel Core 2 Duo T8100 CPU | 10.5 | January 2008 |
OEM (BGA): EC80576GG0453M, OEM (PGA): FF80577GG0453M, PIB (PGA): BX80577T8100 |
| 200/2400 MHz | Intel Core 2 Duo T8300 CPU | 12 | January 2008 |
OEM (BGA): EC80577GG0563M, OEM (BGA): EC80577GG0563MB, OEM (PGA): FF80577GG0563M, PIB (PGA): BX80577T8300 |
Physics
Voltage: (1.00-1.250 V).
Power dissipation: 35 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 45 nm (P1266).
Packaging: Socket P.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Extended family | Extended model | Type | Family | Model | Stepping | Description |
|---|---|---|---|---|---|---|
| 0x0 | 0x1 | 0x0 | 0x6 | 0x7 | 0x6 | stepping M0 |
Step level
Text:
Step levels: M0.
S-Spec / Stepping code
| Model | Code | Stepping |
|---|---|---|
| Intel Core 2 Duo T8100 CPU | SLAP9 | M0 |
| Intel Core 2 Duo T8300 CPU | SLAPA | M0 |
| Intel Core 2 Duo T8300 CPU | SLAPR | M0 |
| Intel Core 2 Duo T8100 CPU | SLAPT | M0 |
| Intel Core 2 Duo T8100 CPU | SLAYP | M0 |
| Intel Core 2 Duo T8300 CPU | SLAYQ | M0 |
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