The ChipList, by Adrian Offerman; The Processor Portal

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Enhanced 3DNow! Instruction Set Architecture (ISA) Extension

Enhanced 3DNow! instructions added with the Athlon processors:

  • PI2FW
    Packed Integer to Floating-Point Word Conversion
  • PFNACC
    Packed Floating-Point Negative Accumulate
  • PFPNACC
    Packed Floating-Point Positive-Negative Accumulate
  • PF2IW
    Packed Floating-Point to Integer Word Conversion
  • PSWAPD
    Packed Swap Doubleword

Geode specific extensions:

  • PFRSQRTV
    Reciprocal Square Root Approximation for a Pair of 32-bit Floats
  • PFRCPV
    Reciprocal Approximation for a Pair of 32-bit Floats