The ChipList, by Adrian Offerman; The Processor Portal
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Intel SMX DRM Instruction Set Architecture (ISA) Extension

Intel SMX DRM instructions added with the Core 2 processors:

  • GETSEC[CAPABILITIES]
    Report the SMX Capabilities
  • GETSEC[ENTERACCS]
    Execute Authenticated Chipset Code
  • GETSEC[EXITAC]
    Exit Authenticated Code Execution Mode
  • GETSEC[SENTER]
    Enter a measured environment
  • GETSEC[SEXIT]
    Exit measured environment
  • GETSEC[PARAMETERS]
    Report the SMX parameters
  • GETSEC[SMCTRL]
    SMX mode control
  • GETSEC[WAKEUP]
    Wake up sleeping processors in measured environment