SSSE3 Instruction Set Architecture (ISA) Extension

SSSE3 SIMD instructions added with the Pentium Xeon and Core 2 processors:

• PABSB/PABSW/PABSD
  Packed Absolute Value
• PALIGNR
  Packed Align Right
• PHADDW/PHADDD
  Packed Horizontal Add
• PHADDSW
  Packed Horizontal Add and Saturate
• PHSUBW/PHSUBD
  Packed Horizontal Subtract
• PHSUBSW
  Packed Horizontal Subtract and Saturate
• PMADDUBSW
  Multiply and Add Packed Signed and Unsigned Bytes
• PMULHRSW
  Packed Multiply High with Round and Scale
• PSHUFB
  Packed Shuffle Bytes
• PSIGNB/PSIGNW/PSIGND
  Packed SIGN