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Intel Core 2 Duo E7xxx series processor (Wolfdale-3M)
Identification
Model name:
Core 2 Duo E7xxx series.
Code name:
Wolfdale-3M.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3. SSSE3, SSE4.1.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 3 Mbyte (other 3 Mbyte disfunctional/disabled).
Architecture
266 MHz QDR Front-Side Bus (FSB).
Memory protection: XD bit.
No protected program execution environment: LaGrande Technology (LT).
No Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management:
- Enhanced Intel SpeedStep Technology (EIST),
- Enhanced Halt State (C1E),
- no Extended Stop Grant State (C2E),
- no Extended State (C4).
Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 266/2533 GHz | Intel Core 2 Duo E7200 CPU | 9.5 | April 2008 |
OEM: EU80571PH0613M, PIB: BXC80571E7200, PIB: BX80571E7200 |
Physics
Voltage: 0.850-1.3625 V.
Power dissipation: 65 W TDP.
Temperature: max. 74.1 °C.
Manufacturing process: 45 nm. (P1266)
Number of transistors: 410 million.
Die size: 107 mm2.
Packaging: Socket T / LGA 775.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Extended family | Extended model | Type | Family | Model | Stepping | Description |
|---|---|---|---|---|---|---|
| 0x0 | 0x1 | 0x0 | 0x6 | 0x7 | 0x6 | stepping M0 |
Step level
Text:
Step levels: M0.
S-Spec / Stepping code
| Model | Code | Stepping | Description |
|---|---|---|---|
| Intel Core 2 Duo E7200 CPU | SLAPC | M0 | PCG: 06 |
| Intel Core 2 Duo E7200 CPU | SLAVN | M0 | PCG: 06 |
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Page viewed 1097 times since Mon 17 Nov 2008, 14:30.
