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19.2.7 Intel Core 2 Duo ULV U7xxx series mobile processor (Merom 2M ULV)
Identification
Model name:
Core 2 Duo ULV U7xxx series.
Code name:
Merom 2M ULV.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Dual-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.
Cache
L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 2 Mbyte.
Architecture
133 MHz QDR bus.
Memory protection: XD bit.
Protected program execution environment: LaGrande Technology (LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Dual-core technology.
Multiplier
Power management
Power management: Enhanced Intel SpeedStep Technology (EIST).
Clock speed
| Clock speed | Model | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|
| 133/1066 MHz | Intel Core 2 Duo ULV U7500 CPU | 8 | April 2007 | OEM (stepping L2, M0): LE80537UE0042M |
| 133/1200 MHz | Intel Core 2 Duo ULV U7600 CPU | 9 | April 2007 | OEM (stepping L2, M0): LE80537UE0092M |
| 133/1333 MHz | Intel Core 2 Duo ULV U7700 CPU | 10 | December 2007 | OEM (stepping M0) |
Physics
Voltage: 0.80-0.975 V.
Power dissipation: 10 W TDP.
Temperature: 0-100 °C.
Manufacturing process: 65 nm (P1264).
Number of transistors: 167 million.
Die size: 111 mm2.
Packaging: FCBGA6.
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Type | Family | Model | Stepping | Description |
|---|---|---|---|---|
| 0x0 | 0x6 | 0xF | 0x2 | stepping L2 |
| 0x0 | 0x6 | 0xF | 0xD | stepping M0 |
Step level
Text:
Step levels:
- L2,
- M0 (Q3 2007).
S-Spec / Stepping code
| Model | Code | Stepping |
|---|---|---|
| Intel Core 2 Duo ULV U7600 CPU | SLA2U | L2 |
| Intel Core 2 Duo ULV U7500 CPU | SLA2V | L2 |
| Intel Core 2 Duo ULV U7700 CPU | SLV3V | M0 |
| Intel Core 2 Duo ULV U7600 CPU | SLV3W | M0 |
| Intel Core 2 Duo ULV U7500 CPU | SLV3X | M0 |
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