bookmark site
save to del.icio.us
19.11.2 Intel Core 2 Quad Q9xxx series processor (Yorkfield)
Identification
Model name:
Core 2 Quad Q9xxx series.
Code name:
Yorkfield.
Supplier:
Intel.
Component class:
CPU.
Generation
Generation: Core 2.
Compatibility
Quad-core technology.
64 bit technology: EM64T.
Multimedia instruction sets: MMX, SSE, SSE2, SSE3. SSSE3, SSE4.1.
Cache
L1 cache: (4x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Two-by-two shared L2 cache: (2x) 6 Mbyte.
Architecture
333 MHz QDR Front-Side Bus (FSB).
Memory protection: XD bit.
Protected program execution environment: LaGrande Technology (LT).
Virtualization Technology (VT, Vanderpool).
Multi-processing
Quad-core technology: two Dual-Core dies in SMP (Symmetric Multi-Processing) configuration (Dual-Chip Module, DCM).
Multiplier
Power management
Power management:
- Enhanced Intel SpeedStep Technology (EIST),
- Enhanced Halt State (C1E),
- from stepping E0: ACNT2,
- from stepping E0: Power Status Indicator (PSI).
Clock speed
| Clock speed | Model | Cache | Multiplier | Introduction | Order part numbers |
|---|---|---|---|---|---|
| 333/2500 MHz | Intel Core 2 Quad Q9300 CPU | 6 Mbyte L2 | 7.5 | March 2008 |
OEM (stepping M1): EU80580PJ0606M, PIB: BXC80580Q9300, PIB: BX80580Q9300 |
| 333/2666 MHz | Intel Core 2 Quad Q9450 CPU | 12 Mbyte L2 | 8 | March 2008 |
OEM (stepping C1): EU80569PJ067N, PIB: BXC80569Q9450, PIB: BX80569Q9450 |
| 333/2833 MHz | Intel Core 2 Quad Q9550 CPU | 12 Mbyte L2 | 8.5 | March 2008 |
OEM (stepping C1): EU80569PJ073N, OEM (stepping E0): AT80569PJ073N, PIB: BXC80569Q9550, PIB: BX80569Q9550 |
Physics
Voltage: 0.8500-1.3625 V.
Power dissipation: 95 W TDP.
Temperature: max. 71.4 °C.
Manufacturing process: 45 nm. (P1266)
Number of transistors: (2x) 410 million.
Die size: (2x) 107 mm2.
Packaging: Socket T / LGA 775.
Thermal management
Thermal management:
- Platform Environment Control Interface (PECI).
System management
Remote management: Intel Active Management (iAMT2).
CPUID32
| Extended family | Extended model | Type | Family | Model | Stepping | Description |
|---|---|---|---|---|---|---|
| 0x0 | 0x6 | 0x7 | 0x4 | stepping B1 | ||
| 0x0 | 0x1 | 0x0 | 0x6 | 0x7 | 0x7 | stepping C1 |
| 0x0 | 0x1 | 0x0 | 0x6 | 0x7 | 0x7 | stepping M1 |
| 0x0 | 0x1 | 0x0 | 0x6 | 0x7 | 0xA | stepping E0 |
Step level
Text:
Step levels:
- B1,
- C1,
- M1,
- E0 (July 7, 2008):
- Power Status Indicator (PSI),
- PECI implementation change,
- XSAVE/XRSTOR instructions,
- ACNT2 processor utilization determination,
- Halide free package.
S-Spec / Stepping code
| Model | Code | Stepping | Description | Introduction |
|---|---|---|---|---|
| Intel Core 2 Quad Q9300 CPU | QAKY | B1 ES | ||
| Intel Core 2 Quad Q9300 CPU | SLAWE | M1 | PCG: 05A | |
| Intel Core 2 Quad Q9450 CPU | SLAWR | C1 | PCG: 05A | |
| Intel Core 2 Quad Q9550 CPU | SLAWQ | C1 | PCG: 05A | |
| Intel Core 2 Quad Q9550 CPU | QGPK | E0 QS | May 2008 | |
| Intel Core 2 Quad Q9550 CPU | SLB8V | E0 | PCG: 05A | July 2008 |
|
|
|
Page viewed 2222 times since Mon 17 Nov 2008, 14:30.
