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Intel introduces Quad-Core Xeon MP processors

Configurations up to 32 processors supported

September 5, 2007 - Today, Intel introduced the first Quad-Core Xeon processors for multi-processor server systems (MP). According to the chip manufacturer, typical applications would be databases, ERP (Enterprise Resources Planning), and Business Intelligence (BI), running in a virtualized environment. With this introduction, Intel is setting the stage for the introduction of AMD's Barcelona processors next week.

The 7300 series processors range up to 2.93 GHz, requiring power envelopes of 130, 80, and 50 Watt TDP. The latter is running at 1.86 GHz and optimized for four socket blades (providing 16 cores per blade) and other high-density rack form factors.


Model Clock speed L2 cache Power dissipation Introduction price
Quad-Core Xeon MP E7310 1.6 GHz 2x 2 Mbyte 80 W TDP $856
Quad-Core Xeon MP E7320 2.13 GHz 2x 2 Mbyte 80 W TDP $1177
Quad-Core Xeon MP E7330 2.4 GHz 2x 3 Mbyte 80 W TDP $1391
Quad-Core Xeon MP E7340 2.4 GHz 2x 4 Mbyte 80 W TDP $1980
Quad-Core Xeon MP X7350 2.93 GHz 2x 4 Mbyte 130 W TDP $2301

Low Voltage:

Model Clock speed L2 cache Power dissipation Introduction price
Quad-Core Xeon MP LV L7345 1.86 GHz 2x 4 Mbyte 50 W TDP $2301

Dual-Core: one core per die disfunctional/disabled.

Model Clock speed L2 cache Power dissipation
Dual-Core Xeon MP E7210 2.4 GHz 2x 4 Mbyte 80 W TDP
Dual-Core Xeon MP E7220 2.93 GHz 2x 4 Mbyte 80 W TDP

Chipset: introduction price: $224.

Servers based on the Xeon MP 7300 series processors are expected to be announced by more than fifty system manufacturers, including Aberdeen, Dell, Egenera, Fujitsu, Fujitsu-Siemens, Hitachi, HP, IBM, NEC, Sun, Supermicro, Unisys, and Verari.

Caneland platform

The Tigerton 7300 series is part of the Caneland platform, also including the 7300 Clarksboro chipset. It supports up to four Xeon MP processors with up to 256 Gbyte of DDR2-533 FB-DIMM memory (four FB-DIMM buses, transfering data at a maximum of 8 Gbyte/s, each supporting eight memory modules).

Clarksboro eliminates the shared Front-Side Bus (FSB) structure of the current Tulsa-class systems, replacing it with a dedicated link between each processor and the chipset. The Dedicated High Speed Interconnect (DHSI), running at 266/1066 MHz, connects the CPU sockets directly to the chipset on the motherboard. Main memory talks to the chipset, not directly to the processor chips.

Intel Dedicated High Speed Interconnect (DHSI). [Intel]

The 64 Mbyte snoop filter optimizes data transfers between the processor caches as well as the memory buses. It is part of what Intel calls Data Traffic Optimizations (DTO). Although the largest cache of the newly introduced 7300 series processors is only 8 Mbyte, Clarksboro's snoop filter can support up to 16 Mbyte of cache per socket.

Larger systems can be build using IBM's X4 chipset. It supports 32 Xeon MP processors (containing 128 cores) and 512 Gbyte of main memory. The X4 is the successor to the current Hurricane X3 chipset supporting single-core Xeon MP, and Dual-Core Paxville Xeon 7000 and Tulsa Xeon 7100 processors.

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